1. Field of Invention
The present invention relates to Media Access Control (MAC) for a telecommunications system and more particularly to a MAC unit that implements time-critical functions in hardware.
2. Description of Related Art
In FIG. 1 a telecommunications network 2 includes a network unit 4 that communicates with other elements of the network 8. The network unit 4 includes a Host CPU (Central Processing Unit 6) and an NIC (Network Interface Card 10), where these components are linked by a Peripheral Component Interconnect (PCI) bus 9. The NIC 10 includes a MAC unit 12 with a CPU 14 and an antenna 15 for radio communication with other elements of the network 8.
The MAC requirements for the 802.11 standard for telecommunications are discussed in detail in “ISO/IEC 8802-11, Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications.” The hardware MAC unit 12 has an associated MAC layer of processes that are implemented either in hardware (HW) or in software (SW). In FIG. 2 the role of the MAC layer 16 in the process flow of the network is illustrated for a conventional implementation, the MAC layer 16 providing a process connection between the Host CPU 6 and the network 8 where the fundamental unit of transmission is a frame. The MAC layer 16 includes three sub-layers: MLME (MAC Sublayer Management Entity 18), which connects the MAC unit 12 with the host CPU 6, FTM (Frame Transition Manager 22), which connects the MAC unit 12 with the network 8, and FLPM (Frame Level Protocol Manager 20), which internally connects the MLME sub-layer 18 with the FTM sub-layer 22.
The MLME processes 18 include high-level management functions, including identification of who is on the network and the granting of associated permissions. Typically, these processes are not considered to be time-critical and are implemented in software on the host CPU 6.
The FTM processes 22 include the low-level functions for the connection to the network via the PHY (Physical Layer 24), which provides the most basic operations for transmission of frames between the network unit 4 and the rest of the network 8. These fundamental processes F— are generally considered to be time critical so that the FTM processes 22 are implemented in hardware on the MAC unit 12 and the PHY processes 24 are implemented in hardware elsewhere on the NIC 10.
The FLPM process 20 include both time-critical and non-time-critical functions that relate to the processing of frames between the high-level functions associated with the MLME process 18 and the low-level functions associated with the FTM process 22. The time critical functions may need to be carried out on the scale of approximately 30–40 microseconds as compared with the smallest time scales in the system, which are of the order of 16 microseconds, for the separation between frames. These may include operations related to interframe spacing and timing, retrying frames, encrypting frames, decrypting frames, filtering frames, receiving acknowledgements, and transmitting beacons. By contrast, the non-time-critical functions may only need to be carried out on the scale of milliseconds or even seconds. These may include operations related to association responses and requests, authentications, collecting and managing network statistics, and system reconfigurations due to roaming.
Because of the inter-relatedness of the functions associated with the FLPM sub-layer 20, both the time-critical functions and the non-time-critical functions are typically implemented in software on the MAC CPU 14, not the host CPU 6, Implementing the FLPM sub-layer 20 on the host CPU 6 would lead to additional time delays associated with transmission across the PCI bus 9 from the host CPU 6 to the MAC unit 12, delays that may compromise the time-critical functions of the FLPM sub-layer 20. However, there are also disadvantages associated with the implementation of the FLPM sub-layer 20 on the MAC CPU 14. For example, the MAC CPU 14 takes up limited space in the MAC unit 12 and consumes valuable power. Additionally, unforeseen interactions between software components may lead to additional operational errors.